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Agenda

Location: Hilton Hotel, Salon F

Opening Session
8:30-10:00 a.m.
Chair: Volodymyr Kindratenko, National Center for Supercomputing Applications

• Keynote: Processor Architecture: Past, Present, Future - Steve Wallach, Chief Scientist, Co-Founder, and Director of Convey Computer Corp.
• Architecture of a Vertically Stacked Reconfigurable Computer - Daniel Stevenson, and Robert Conn, siXis, Inc.
• Scalable FPGA-Array for High-Performance and Power-Efficient Computation based on Difference Schemes - Kentaro Sano, Wang Luzhou, Yoshiaki Hatsudam, and Satoru Yamamoto, Tohoku University

Break
10:00-10:30 a.m.

Technology Session
10:30 a.m.-noon
Chair: Volodymyr Kindratenko, National Center for Supercomputing Applications

• Evaluating FPGAs for Floating Point Performance - Dave Strenski, Cray Inc; Jim Simkins, Richard Walke, and Ralph Wittig, Xilinx Inc.
• Hardware Task Scheduling Optimizations for Reconfigurable Computing - Miaoqing Huang, Harald Simmler, Proshanta Saha, and Tarek El-Ghazawi, The George Washington University
• MPI as an Abstraction for Software-Hardware Interaction in High Performance Reconfigurable Computers - Manuel Saldaña, Arun Patel, Arches Computing Systems; Paul Chow, Christopher Madill, Daniel Nunes, Danyao Wang, University of Toronto; Henry Styles, Andrew Putnam, and Ralph Wittig, Xilinx, Inc.
• Virtualizing and Sharing Reconfigurable Resources in High-Performance Reconfigurable Computing Systems - Esam El-Araby, Ivan Gonzalez, and Tarek El-Ghazawi, The George Washington University

Lunch
Noon-1:20 p.m.

Applications Session
1:20-2:50 p.m.
Chair: Craig Steffen, National Center for Supercomputing Applications

• Massively Parallelized Quasi-Monte Carlo Financial Simulation on an FPGA Supercomputer - Xiang Tian and Khaled Benkrid, The University of Edinburgh
• Performance Bounds of Molecular Dynamics Simulations on High Performance Reconfigurable Computing Systems - Matt Chiu, Martin Herbordt, Boston University; Martin Langhammer, Altera
• Floating Point based Cellular Automata Simulations using a dual FPGA-enabled system - S. Murtaza, A. G. Hoekstra, and P. M. A. Sloot, University of Amsterdam
• Two-Dimensional Phase Unwrapping on FPGAs and GPUs - Sherman Braganza, Miriam Leeser, Northeastern University

Break
2:50-3:20 p.m.

OpenFPGA Award
3:20-3:30 p.m.
Chair: Eric Stahlberg

Technology Update Panel - Hardware/Software
3:30-5:30 p.m.
Chair: Eric Stahlberg

• Altera in Reconfigurable computing: What's new, what's coming - Tom VanCourt, Altera
• Current SRC Status - Jon Huppenthal, SRC Computers
• Current SGI Status - Matthias Fouquet-Lapar, SGI
• FPGA Accelerated Computing Solutions - Allan Cantle, Nallatech
• Current XtremeData Status - Geno Valente, XtremeData
• Current DRC Computer Status - Roy Graham, DRC Computer Corp
• The Future for Accelerators: Mitrionics HPRCTA Update - Stefan Möhl, Mitrionics
• Impulse Software-to-FPGA Technology Update - David Pellerin, Impulse Accelerated Technologies
• S/W Technology Update: SRC's Carte Directions - David Caliga, SRC Computers