Held in conjunction with SC10
November 14, 2010
New Orleans, Louisiana
High-performance reconfigurable computing (HPRC) is a computing paradigm that offers a potential to improve performance and power efficiency of many computationally intensive scientific codes beyond what is possible on today's mainstream high-performance computers. Current HPRC systems rely on field-programmable gate arrays (FPGAs) for the direct hardware execution of computationally intensive kernels, which is a radical departure from the Von Neumann architecture. The academic community has been exploring this computing paradigm for over a decade and the technology has proven itself to be practical for a number of HPC applications.
The goal of this workshop is to provide a forum for computational scientists who use reconfigurable computers and the developers of this technology to discuss the latest progress and trends in the field. Topics of interest include architectures, languages, compilation techniques, tools, libraries, run-time environments, performance modeling, benchmarks, algorithms, methodology, applications, trends, and the latest developments in the field of HPRC.
The OpenFPGA Award for Advancement in Industry Standards in Reconfigurable Computing will be presented to recognize the paper/presentation that exemplifies and advances efforts to develop portable applications on reconfigurable computing systems. The award will include a modest cash award and two years of OpenFPGA membership for up to eight co-authors.
Workshop Co-Chairs: Volodymyr Kindratenko, NCSA; Tarek El-Ghazawi, GWU
Technical Program Chair: Volodymyr Kindratenko, NCSA
OpenFPGA Award Chair: Eric Stahlberg, OpenFPGA
Industry Panel Chair: Prasanna Sundararajan, Xilinx