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2005 RSSI Speaker Bios
Michael Babst, DSPlogic, Inc.
Michael Babst is the president of DSPlogic, Inc., a business he founded in 2000 that is dedicated to delivering world-class FPGA-based RC and DSP algorithms, products, and design tools. He has 14 years of engineering and management experience in the defense communications, wireless, satellite, and radar/sonar industries developing systems and products for industry leaders such as General Electric, Lockheed Martin, Comsat Laboratories, and ViaSat. He holds a B.S. from Lehigh University, an M.S. from Syracuse University, and a Ph.D. from the Pennsylvania State University, all in Electrical Engineering.
Duncan A. Buell, University of South Carolina
Duncan A. Buell received the B. S. and M. A. degrees in mathematics from the University of Arizona and University of Michigan, respectively, and in 1976 his Ph. D. in mathematics from the University of Illinois at Chicago. He was an assistant and then associate professor in the Department of Computer Science at Louisiana State University in Baton Rouge.
In 1986 he joined the Supercomputing Research Center (now the Center for Computing Sciences), a division of the Institute for Defense Analyses, doing high-performance computing and computational mathematics research for the National Security Agency. He has written two books and more than 50 research papers in number theory, document and information retrieval, parallel algorithms, and computer architecture.
While at IDA he was project manager for the Splash 2 reconfigurable computing project, one of the first successful ventures into the use of field programmable gate arrays (FPGAs) as the programmable "CPU" in what is now known as a reconfigurable a computing machine. He was also one of the co-founders of the FPGAs for Custom Computing Machines (FCCM) conference held yearly since 1993.
In 1997 Dr. Buell was a member of team that received a National Meritorious Unit Citation from Director of Central Intelligence George Tenet for the solution of a long-outstanding problem of national significance.
He joined the University of South Carolina as Professor and Chair of the Department of Computer Science and Engineering in October 2000, where he continues research in high-performance and reconfigurable computing and in computer security.
Allan Cantle, Nallatech
Allan Cantle founded Nallatech in 1993 and has served as president and chief executive officer since the company's incorporation. He is responsible for formulating the company's overall strategy, vision, and the focus necessary for Nallatech to maintain its leadership in multi-FPGA high-performance computing architectures and tools, which are capable of delivering 100 times the performance of traditional computing platforms.
Cantle has grown the company from an office in his home study to a company employing 65 staff in 5 offices across the UK & USA. Cantle's 22 years in the electronics industry included 13 years at BAE Systems as a systems engineer before starting Nallatech. Cantle is also a non-exec Director of Scottish Enterprise Lanarkshire, achieved a 1st Class honours degree in Electronics Engineering and became a Chartered Engineer at the young age of 26.
After graduating from The University of Pune with a bachelor's degree in electronics and telecommunications, Chitalwala completed a mater's degree in computer engineering at George Washington University (GWU). While at GWU, Chitalwala was responsible for researching the implementation of cryptographic algorithms on and methods for benchmarking reconfigurable computing systems. During his tenure at GWU, he was the primary researcher involved with the Starbridge hypercomputer and the Viva FPGA programming environment. Since his graduation in the Fall of 2004, Chitalwala has been responsible for providing customer support and training for Starbridge.
Jeffrey P. Hammes, SRC Computers, Inc.
Dr. Hammes earned his Ph.D. in Computer Science from Colorado State University in 2000, where he did compiler development work on the DARPA-funded Cameron Project, which compiled a pure functional language to reconfigurable hardware. During his graduate work, he also did research at Los Alamos National Laboratory in various areas including performance experiments on the Monsoon Dataflow Machine, parallel discrete event simulation, and optimized gather/scatter libraries for the Cray T3D. Jeff Hammes has been a member of the MAP Compiler Development Group at SRC since July 2001. His work with SRC has focused on compiling C and Fortran to highly pipelined and parallel logic and in the development of a low level Verilog infrastructure that bridges the gap between abstract dataflow graphs and synthesizable hardware. Hammes currently has one patent, and has various patents pending.
Doug Johnson, Celoxica, Inc.
For the past 2 1/2 years, Johnson has been responsible for business development and technical marketing for Celoxica's C-based synthesis tools, reconfigurable computing development boards and design services. Johnson has over seven years of business and applications engineering experience in the areas of C-based behavioral synthesis, synthesizable DSP cores, image and audio compression cores and intellectual property licensing. For five years prior to his tenure at Celoxica, Johnson directed the U.S. business development for Frontier Design/Adelante Technologies, a Belgium-based company. He spent 12 years as an applications engineering consultant with Silicon Compiler Systems/Mentor Graphics specializing in mixed-signal simulation, standard cell place-and-route, logic synthesis and silicon compilation. In addition, he has design experience with several companies in the areas of RF, analog and communications systems. Johnson has a BSEE from the University of Illinois at Urbana-Champaign.
Stefan Möhl, Mitrion
Stefan Möhl, along with Pontus Borg (not attending), founded Mitrionics in 2001. He currently holds the position of Chief of Research there. Mitrionics is a Swedish incorporated company based in the university town of Lund. The business focuses on allowing software development practices to be used in the world of High-Performance Reconfigurable Computing. Apart from his studies in Computer Science, he has studied Philosophy, Linguistics and Psychology. His previous experiences also
include founding the e-commerce startup Shopsense in 1999.
Vincent Natoli, Stone Ridge Technology
Natoli is one of the founders of Stone Ridge Technology, a Maryland-based company developing software applications and tools to make the use of reconfigurable hardware more transparent to HPC application developers. Natoli holds a PhD in physics from the University of Illinois, B.S. and M.S. degrees from the Massachusetts Institute of Technology and an M.S. in the management of technology from the Wharton School and the School of Engineering at the University of Pennsylvania. He has 15 years' experience in high-performance computing, including experience in computational electronic structure, molecular modeling and computational fluid dynamics. Natoli worked for nine years as a senior physicist at ExxonMobil Corporate Research Laboratory in Clinton, New Jersey, and for two years at the Army Research Laboratory in Aberdeen, Maryland, for High Performance Technologies Inc., where he led a group of computational scientists. Natoli founded Stone Ridge Technology in 2003 to create tools that enable HPC developers to harness the computing potential of FPGAs.
Daniel S. Poznanovic, SRC Computers, Inc.
Dan Poznanovic has been serving as the vice president of Software Development at SRC for the past three years, after being hired as a senior staff engineer in the software development group in 1999. Poznanovic has been instrumental in setting the system software and compiler development paths. He has defined the control architecture of the SRC MAP, implemented the initial MAP support library, formed the SRC compiler team and led the development of the MAP programming environment. Mr. Poznanovic has over 30 years of experience in the computing industry, in both applications and system development and has held several leadership roles at Cray Research and SGI. Mr. Poznanovic has had one patent issued, and has a number of patents pending. Poznanovic earned a B.A. in Chemistry and Mathematics from the University of Minnesota. As a Ford Fellow at the University of Pennsylvania's Moore School of Electrical Engineering he earned a Master of Science in Engineering.
Eric A. Stahlberg, Ohio Supercomputer Center/Franklin University
Eric Stahlberg is a Senior Systems Manager at the Ohio Supercomputer Center, where he works with researchers across Ohio to develop and apply emerging computational technologies to challenging life science problems. While at OSC, Stahlberg has helped deliver technology resources in Ohio by leading efforts to create Platform Lab, a resource facility for system validation and testing; leading software development for a DoD contract to improve user productivity of COLUMBUS; developing new portal delivery systems for OSC applications as part of the OSC Sun Center of Excellence for High Performance Computing Environments; and leading OSC efforts for selecting software to use statewide in both life sciences and collaborations. Most recently, Eric has played a key role in bringing together OpenFPGA, an organization committed to accelerating the adoption of reconfigurable computing technology in enterprise and high-performance computing environments.
Prior to arriving at OSC in October 2000, Stahlberg worked at Chemical Abstracts Service, leading the development teams and release efforts for SciFinder, CAS's leading information search and discovery tool. He previously worked at Cray Research Inc., contributing to the development of UniChem, an early grid computing system for computational chemistry. While living in Minnesota, Stahlberg worked as an adjunct instructor at the University of St. Thomas' Graduate Programs in Software teaching classes on systems analysis and design. Stahlberg continues as an adjunct faculty instructor for Franklin University in Columbus teaching advanced algorithm analysis and high-performance and parallel computing.
David Strenski, Cray, Inc.
Dave Strenski is an application analyst for Cray Inc., working on reconfigurable computing and FPGA integration. He also works closely with Cray's CAE and bioinformatics customers.
Prior to Cray Inc., Dave held a variety of technical positions at Silicon Graphics Inc., Cray Research Inc., Supercomputer Systems Inc., and Science Application International Corp.
Dave holds a BS in Land Surveying, a BS in Civil Engineering, and an MS in Mechanical Engineering. His publications include work in the areas of parallel computing and numerical consistency of parallel results. He has also published work relative to searching genomic data using the special bit functions on Cray's vector hardware, and has a patent pending on a meshing algorithm for threaded fasteners.
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